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    DFT Engineer - Shanghai, 中国 - Cisco

    Cisco
    Cisco Shanghai, 中国

    6天前

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    描述

    Who You'll Work With

    Cisco CRDC (China R&D Center) ASIC group is founded in 2006, which is now a part of Cisco Silicon Group driving our next generation network devices - Cisco Silicon OneTM. We're using cutting edge methodologies and technology to develop ASICs for switching, routing and security products, covering all networking segments. CRDC ASIC team has the full-scale of capabilities in architecture, design, DV, DFT as well as SDK/SW. We are currently working on next-Gen chips with consolidated architecture, and deeply engaged in the core developments of leading edge ASICs. While Cisco starts merchant silicon business, CRDC ASIC team built up a strong SDK/System team supporting China customers directly, which extended team's responsibility and opportunities.

    What You'll Do

    You'll be joining Cisco Silicon One group which is at the center of the silicon development at Cisco.

    As a DFT engineer you will take part in each design stage of the product.

    From product architecture, define DFT solution, implementing the code in RTL, design verification, physical design implementation of DFT HW, pattern generation, gate-level-simulations, timing signoff for DFT mode, prepare pattern for Silicon, Silicon bring-up, test program stabilization, product characterization and preparations for production.

    Who You Are

  • 5-10 years relevant experience
  • Strong verbal communication skills in both Chinese and English and ability to thrive in a dynamic environment
  • Knowledge of the latest state-of-the-art trends in DFT, test and silicon engineering.
  • Hands-on experience with Jtag protocols, Scan and BIST architectures, including memory BIST, IO BIST
  • Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design.
  • Experience working with simulation, and debug with VCS and other simulators.
  • Scripting skills: Python/Perl.
  • Educational Background

    Master of EE/CS or related field.



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