数字电路设计工程师 - Nanjing City
仅限注册会员 Nanjing City, 中国
1个月前
* 此薪资范围由 beBee 估算
Job summary
Work with ASIC architect to define micro architecture specification of major functional blocks Utilize your design skill to develop RTL code in Verilog/System Verilog HDL and produce high performance, low power, optimized design netlist using industry standard synthesis tools.
Responsibilities
- Define digital logic circuit module specification documents
- Use hardware description language (Verilog/System Verilog, etc.) to complete digital circuit module design
- Assist verification engineers to complete module verification, and actively participate in verification coverage analysis
- Resolve module bugs in a timely manner
- Assist backend design engineers to complete physical implementation
- Participate in chip testing
Qualifications
- Electronics, communications, integrated circuits, etc. Bachelor's degree or above, master's degree preferred
- 3-5 years or more of work experience
- Familiar with hardware description languages, such as Verilog, System Verilog, etc.
- Familiar with script languages, such as perl, tcl, Python, etc.
- Experienced in network chip design, especially those with Ethernet bottom layer circuit, protocol stack knowledge will be given priority
- Familiar with AHB/APB/AXI protocol, understanding arm architecture and debugger working principle is preferred
- Good team cooperation and communication coordination skills
工作描述
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