Synopsys

Verification Applications Engineer (BB-C8F24)

Found in: Neuvoo CN

Description:

Job Description

and Requirements

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.
Verification is the number one bottleneck in SOC designs today. Synopsys is uniquely positioned to offer the most complete verification solution in the market today. VCS is the Platform for Synopsys verification flow. It incorporates a suite of built-in high-performance next generation technologies for test bench automation, assertion based verification, coverage closure, etc., which are needed for verifying challenging multi-million gate designs. Synopsys Verification IP provides verification engineers’ access to the industry latest protocols, interfaces and memories required to verify their SoC designs. Deployed across thousands of projects, Synopsys VIP supports AMBA, PCI Express, USB, MIPI, DDR, LPDDR, HDMI, Ethernet, SATA/SAS, Fibre Channel, OCP and others. Synopsys Verification IP supports advanced SystemVerilog-based testbenches including built-in methodology support for UVM and VMM. It includes features to simplify testbench development, verification planning, functional coverage and improved simulation runtime.
Senior Applications Engineer
We’re looking for a Senior Applications Engineer to join the team.
Does this sound like a good role for you?
As a Senior AE for Verification, you will be responsible for successful deployment of Synopsys verification flow to a growing customer base in Asia Pacific. Your responsibilities include onsite deployment of industry leading automation and verification technologies, creation of technical collateral, defining new methodology, and product support, testing and writing specifications for enhancement. You will be responsible for interacting with and support customers, sales, and marketing, and help analyze and resolve complex verification issues for customers’ cutting-edge ASIC designs. The position offers a great opportunity to grow by learning state-of-art verification flows from Synopsys.
Key Qualifications

  • MS or PhD majored in EE with more than 3 years of IC design/verification experiences.
  • Good knowledge of high-level design methodologies and strong communication skills are required.
  • Ability to work with customers and R&D teams is important.
  • Real project experiences in ASIC/SoC verification are required.
  • Proficient with HDL (Verilog/VHDL), HVL(e/Vera/SystemVerilog), C/C++, Unix, and having a strong understanding of ASIC design/verification flows, VLSI, and/or CAD-engineering.

  • Preferred Experience

  • Experience on VMM/OVM/UVM and knowledge of SNPS verification IPs are preferred.
  • Knowledge and experience on protocols like Ethernet, PCIE and USB will be a plus.

  • Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

    Job Category

    Engineering

    Hire Type

    Employee

    Country

    China

    calendar_today2 days ago

    Similar jobs

    location_onShanghai, China

    work Synopsys

    Apply:
    I expressly authorise the Terms and Conditions