Principal Application Engineer (Design IP) (BB-36A6C)
Found in: Neuvoo CN
Description:
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position Description:
Interface with customer architects and R&D unit to enable evaluation of application specific IP performance and features per customer’s SoC requirements
Providing direct technical customer support and assistance to enable customers to successfully integrate/use Design IP in their SoC
Working with the field team to manage the IP activities in the region to achieve a high customer satisfaction rate and for building strong customer relationships
Providing customer feedback on new/existing requirements for Design IP usage from customers to the R&D business unit
Qualifications:
minimum of 5 years design or customer related working experience
Experience in SoC Front-end design
Experience with at least one of DDR/HBM/PCIE/Serdes/Etherent protocols will be a plus
Good written and verbal communication skills and problem solving skills are required
Good understanding of SoC architecture
Back-end design and analog skills
Good understanding of the semiconductor IP marketplace and ecosystem
We’re doing work that matters. Help us solve what others can’t.
calendar_today4 days ago
Similar jobs
info Full time
location_onShanghai, China
work Cadence Design Systems, Inc.